It is estimated that few software and hardware engineers who have worked in the communication industry but have not contacted Freescale processors . for example POWERPC Series MPC860 、 MP8260 、 MPC8315 as well as P2020 All of them have been applied on a large scale. What impressed me most was that I once did an experiment, sixteen Chunfeiscarian P2020 The processor has been running at full load for more than a month at the same time, and none of them has been restarted or crashed. It can be said that the stability and reliability of Freescale processors are widely recognized in the industrial control industry.

For the specific introduction of the processor of the development board and the use of the software, this article will not repeat it one by one, which can be found in many articles on the Internet. This article focuses on introducing the development board from the perspective of pure hardware. Not much to say, as shown above.        

        There are two labels of classic sensitive devices on the upper right corner of the outer package, reminding you that it is best to wear an electrostatic bracelet when using such products. If it is inconvenient, you can buy a wireless one, ten I don't want to advertise here. There is another place marked PbFree = Y RoHS = Y As hardware makers may know, this development board adopts lead-free process, is lead-free, and complies with RoHS Standards. RoH S Is created by Legislation ， Its full name is the Directive on Restricting the Use of Certain Hazardous Components in Electronic and Electrical Equipment (which can be searched on the Internet). to make a long story short, RoH S The standard of is still very strict, and the production team of the development board must have worked hard.

       Below are some detailed drawings. Main chip: MK64FN1M0VLL12 , chip to forty-five It is placed at an angle of degrees to facilitate wiring and layout when necessary. On the surface, PCB The chip package pin of is slightly longer than the chip pin, so it will not fail to solder in batch. Don't know the design PCB The engineers of IPC Standard design.

       PHY Chip, U13 , Model KSZ8081. It only supports 10M and 100M The Ethernet link layer transceiver chip does not support gigabit ports, although RJ45 The interface with its own transformer is used, which can also be verified from the wiring behind. Chip adoption QFN The package and pins are all under the chip, so manual welding is difficult. I still remember that some companies require manual welding when recruiting hardware engineers QFN Encapsulated chips.

SD Card slot, you can see the wiring below the card slot, link SD The serpentine wiring is adopted for the card package and the main chip pin. PCB Any routing on the will cause time delay to the signal, especially when passing through high-frequency signals. The main function of serpentine routing is to compensate for the parts of the same group of related signal lines with small delay, which are usually no longer or shorter than other signal routing. The most typical is the clock line, which usually does not need any other logic processing, so its delay will be less than other related signals.

High speed digital PCB The equal line length of the board is to keep the delay difference of each signal within a range to ensure the validity of the data read by the system in the same cycle. Generally, the delay difference is not more than 1/4 The clock cycle and the line delay difference per unit length are also fixed. The delay is related to the line width, line length, copper thickness, and board structure. If the line is too long, the distributed capacitance and inductance will increase, the signal quality will decline, and the signal quality will deteriorate. Therefore, the serpentine line spacing is required to be at least twice the line width. The smaller the rise time of the signal, the more vulnerable to the influence of the distributed capacitance and inductance.

    PCB The details of the design. As shown by the red arrow in the figure below, a piece of copper is laid between the two wiring lines, and the two ends of the copper are connected to the ground with two vias. This design method has theoretical and practical basis. The short ground at both ends of copper laying can minimize the crosstalk of signals on both sides and export the interference signals. However, in actual design, many engineers just lay copper without short grounding at both ends. According to the transmission line theory, interference signals will be reflected back and forth on the copper, causing interference to the signal lines at both ends.

Appreciation of the reverse design, see the figure below. After careful observation, the chip and other components are all pasted on the front side, while the reverse side only has pads. Why? Single side patch can reduce the production cost. When welding, only one side needs to be welded, which can reduce the finished product without affecting the overall performance.

Earlier said PHY Chip only supports 10M and 100M , which can be verified from the following wiring. The arrow shows two sets of differential routing. There is no through hole on the reverse side. There should be only two groups. These two groups of wires are used as transceivers respectively, and 1000M In order to achieve two-way receiving and sending 1000M Four groups of differential lines are required for the data rate of. Each group of differential lines can simultaneously transmit and receive data, so RJ45 Although the interface supports 1000M , but PHY The chip is obviously not supported. actually, 1000M Bidirectional transceiver still requires high data processing capacity, and the processor of this development board may not be able to handle such a large amount of data.

It can be seen that a circle of vias have been punched around the periphery of the engineer's development board to suppress EMI , considering such details, it can be seen that the development team has made great efforts.

       In general, the hardware design of this development board has fully considered the details. In combination with the function expansion of the development board, I believe that it can meet the needs of the actual development process, which is really a conscientious work.