How to check the "constitution" of Snapdragon 600| Love to play computer games - 上海419贵族宝贝-上海后花园1314-上海品茶网-阿拉爱上海

In the previous article, we used HyperTerminal Enter the dmesg command to view the level of APQ8064 The most popular SoC recently is undoubtedly APQ8064T, the upgraded version of APQ8064 (i.e., a member of Snapdragon 600 series), which has been widely used in the new generation of high-end mobile phones, including Xiaomi 2S, HTC One LG Optimus G Pro Wait, how can we check its "constitution"?

In APQ8064, SoC is divided into four grades: slow, normal, fast and fast (also expressed with numbers, the larger the better). This time, APQ8064T is graded more carefully, with seven grades, which are respectively expressed with the numbers 0,1,2,3,4,5,6 (the larger the better)

On the mobile phone using APQ8064T, we can find the following file in the system root directory: "/proc/last_kmsg"

Open the file with a text editor and search for "PVS". You can see results similar to the following:

Optimus G Pro is used here for testing, and the grade is 2 (the grade is so low, no wonder the performance is so poor...).

SPEED BIN: represents the CPU partition. APQ8064 is 0, while APQ8064T is 1. Here, 1 is displayed.

ACPU PVS: represents the level division of CPU's "constitution".

The CPU frequency, L2 cache level and voltage (μ v) under different PVS levels are set as follows:

The setting of PVS: 2 viewed in the text:

static struct acpu_level tbl_PVS2_1700MHz[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 925000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 925000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 925000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 925000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 937500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 950000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 975000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 1000000 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 1012500 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 1037500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 1075000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1100000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1137500 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1162500 },
{ 0, { 0 } }
};

Example: "1728000, HFPLL, 1, 0x40}, L2 (14), 1162500" means that at 1.7GHz, the L2 cache frequency level is 14, and the voltage is 1.16V.

Setting of the highest PVS: 6:

static struct acpu_level tbl_PVS6_1700MHz[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 875000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 875000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 875000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(14), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(14), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(14), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(14), 975000 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(14), 1000000 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(14), 1025000 },
{ 1, { 1728000, HFPLL, 1, 0x40 }, L2(14), 1050000 },
{ 0, { 0 } }
};

It can be seen that the higher the PVS level, the lower the voltage required to reach the same frequency.

More settings can be viewed:

Learn more about new cool devices, stay tuned